mixing -c and -o on cc command

[Kent Peacock]

xx
I have a useful modification to the cc command that allows makefiles that
access files outside the current directory to be terse.

The basic idea is to allow the -o option not to be ignored when used in
combination with other options, notably -c. Thus, the following makefile
entry is possible:

.c.o:
	$(CC) -c $*.c -o $@

where the target .o and .c files need not reside in the current directory
in order for the implicit rule to be invoked correctly. (The problem with
the current way of doing things is that the -o option is ignored when -c or
-S is used.) Note that this is an upward-compatible change to cc, and does
not break anything. The paranoid check for overwriting .c files need not
be removed either to make this work. I have used this on several large projects,
with code maintained in a number of subdirectories off a main directory, and
it avoids the problem of a single entry in the makefile for each target .o file.

The change is very simple; I will post it to net.sources if there is interest.
(I would like to see this become standard, so that I don't have to change cc if
I move again.)