sizeof

[Stanley Friesen]

In article <7904 at brl-tgr.ARPA> cottrell at nbs-vms.ARPA writes:
>/*
>Bob Larson has a machine with 48 bit ptr's & 32 bit int's & long's.
>What is this beast? Someone also said that ptr's to different objex
>may be different sizes. Where & why? I realize that a certain machine
>may desire this to make implementation as efficient as possible, but I
>think the designers should just bite the bullet and make all ptr's
>the same size.

	I dont't know about Bob Larsons's machine, but I used to use
a Honeywell mainframe.  The architecture dates back to the 60's,
and Honeywell has kept it around in the name of upward compatibility.
The machine is a *word* oriented machine with a 36 bit word(yes 36,
not 32), each instruction is one word in length, and contains 1-1/2
addresses, a memory address and a register specifier.   A word pointer
is simply a word containing a memory address in the same bits holding
one in an instruction word, the last 17 bits of the word.  Such a word
can be used with any normal indirection mode(there are three on these
machines). If you want byte addressing(9-bit bytes *or* 6-bit bytes),
you must use a special "tagged" indirect mode in which the indirect
word(the pointer) contains a normal address plus a special field
specifying the byte within the destination word. Because of the
way "tagged" indirection works it may be necessary to make a *copy*
of the pointer to use for dereferencing if you intend to re-use it.!!
This is what I call brain-damaged, but it is *real*, and a Honeywell
C-compiler must put up with different types of pointers for ints and
chars, *or* make chars 36 bits.
-- 

				Sarima (Stanley Friesen)

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