IEEE floating point format

[Tim Olson]

In article <1270 at atanasoff.cs.iastate.edu> hascall at atanasoff.cs.iastate.edu.UUCP (John Hascall) writes:
| In article <9697 at alice.UUCP> ark at alice.UUCP (Andrew Koenig) writes:
| >In article <2170002 at hpldsla.HP.COM>, manoj at hpldsla.HP.COM (Manoj Joshi) writes:
|  
| >> What is the format for the IEEE floating point storage
|  
| >The format is:
|  
| >	field		32-bit format		64-bit format
|  
| >	sign			1			1
| >	exponent		8			12
| >	fraction		23			55
|                             ------                    -----
| 				32 (ok!)                68 (huh?)
|  
|       Is it <1,8,55>, <1,12,51> or some other thing?
|       (or have they found a way for more hidden bits :-)

Neither.  Double precision fields are 1 sign, 11 exponent, and 52
fraction bits.


	-- Tim Olson
	Advanced Micro Devices
	(tim at amd.com)