v09i096: patches for X11R4 for SCO UNIX, Part10/12
microsoft!jimke at uunet.uu.net
microsoft!jimke at uunet.uu.net
Fri Oct 12 15:20:44 AEST 1990
Submitted-by: microsoft!jimke at uunet.uu.net
Posting-number: Volume 9, Issue 96
Archive-name: sco.patches/part10
#! /bin/sh
# This is a shell archive. Remove anything before this line, then unpack
# it by saving it into a file and typing "sh file". To overwrite existing
# files, type "sh file -c". You can also feed this as standard input via
# unshar, or by typing "sh <file", e.g.. If this archive is complete, you
# will see the following message at the end:
# "End of archive 10 (of 12)."
# Contents: fix-14.sco10
# Wrapped by jimke at kellman on Sat Oct 6 17:13:34 1990
PATH=/bin:/usr/bin:/usr/ucb ; export PATH
if test -f 'fix-14.sco10' -a "${1}" != "-c" ; then
echo shar: Will not clobber existing file \"'fix-14.sco10'\"
else
echo shar: Extracting \"'fix-14.sco10'\" \(39912 characters\)
sed "s/^X//" >'fix-14.sco10' <<'END_OF_FILE'
X*** ./mit-orig/server/ddx/ibm/vga/vgaHWCntl.c Thu Oct 4 16:51:04 1990
X--- ./mit/server/ddx/ibm/vga/vgaHWCntl.c Wed Oct 3 18:33:54 1990
X***************
X*** 1,5 ****
X /*
X! * Copyright IBM Corporation 1987,1988,1989
X *
X * All Rights Reserved
X *
X--- 1,5 ----
X /*
X! * copyright IBM Corporation 1987,1988,1989
X *
X * All Rights Reserved
X *
X***************
X*** 33,304 ****
X ******* EVERYTHING
X */
X
X void
X save_vga_state( VS )
X register struct vga_video_hardware_state *VS ;
X {
X! register IO_Address Target_Reg ; /* if mono == 0x3B0, if color == 3D0 */
X! register IO_Address Base_Reg ; /* if mono == 0x3B0, if color == 3D0 */
X
X! /* Read General Registers */
X! VS->Feature_Control = inb( 0x3CA ) ;
X! VS->Video_Enable = inb( 0x3C3 ) ;
X! Base_Reg = ( ( VS->Misc_Output_Reg = inb( 0x3CC ) ) & 1 ) ? 0x3D0 : 0x3B0 ;
X! VS->Input_Status_0 = inb( 0x3C2 ) ;
X! /* Initialize Flip-Flop */
X! VS->Input_Status_1 = inb( Base_Reg + 0xA ) ;
X
X! /* Save Attribute Registers 03C0 & 03C1 */
X! /*
X! INTS_OFF() ;
X! */
X! VS->Attr_Addr_Reg = inb( 0x3C0 ) ; /* Save Existing Index First */
X! /* Target_Reg Used As Scrap */
X! for ( Target_Reg = 0 ; Target_Reg <= 0xF ; Target_Reg++ ) {
X outb( 0x3C0, (unsigned char) Target_Reg ) ;
X! /* Read It, Save It, Then Write It Back */
X! outb( 0x3c0, ( VS->Palette[Target_Reg] = inb( 0x3C1 ) ) ) ;
X }
X- outb( 0x3c0, 0x30 ) ;
X- outb( 0x3c0, ( VS->Attr_Mode = inb( 0x3C1 ) ) ) ;
X- outb( 0x3c0, 0x31 ) ;
X- outb( 0x3c0, ( VS->Overscan_Color = inb( 0x3C1 ) ) ) ;
X- outb( 0x3c0, 0x32 ) ;
X- outb( 0x3c0, ( VS->Color_Plane_En = inb( 0x3C1 ) ) ) ;
X- outb( 0x3c0, 0x33 ) ;
X- outb( 0x3c0, ( VS->Horiz_PEL_Pan = inb( 0x3C1 ) ) ) ;
X- outb( 0x3c0, 0x34 ) ;
X- outb( 0x3c0, ( VS->Color_Select = inb( 0x3C1 ) ) ) ; /* Attr_Addr_Reg == 14 */
X- /* Re-Enable Video Access To The Color Palette */
X- /*
X- INTS_ON() ;
X- */
X-
X- /* Save Crt Controller Registers 03?4 & 03?5 */
X- VS->Index_Reg = inb( Target_Reg = ( Base_Reg += 0x4 ) ) ;
X- outb( Base_Reg, 0x00 ) ;
X- VS->Horiz_Total = inb( ++Target_Reg ) ;
X- outb( Base_Reg, 0x01 ) ;
X- VS->Horiz_End = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x02 ) ;
X- VS->H_Blank_Start = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x03 ) ;
X- VS->H_Blank_End = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x04 ) ;
X- VS->H_Retrace_Start = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x05 ) ;
X- VS->H_Retrace_End = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x06 ) ;
X- VS->Vert_Total = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x07 ) ;
X- VS->Overflow = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x08 ) ;
X- VS->Preset_Row_Scan = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x09 ) ;
X- VS->Max_Scan_Line = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x0A ) ;
X- VS->Cursor_Start = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x0B ) ;
X- VS->Cursor_End = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x0C ) ;
X- VS->Start_Addr_Hi = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x0D ) ;
X- VS->Start_Addr_Lo = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x0E ) ;
X- VS->Cursor_Loc_Hi = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x0F ) ;
X- VS->Cursor_Loc_Lo = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x10 ) ;
X- VS->V_Retrace_Start = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x11 ) ;
X- VS->V_Retrace_End = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x12 ) ;
X- VS->V_Display_End = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x13 ) ;
X- VS->Underline_Loc = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x14 ) ;
X- VS->Offset = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x15 ) ;
X- VS->V_Blank_Start = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x16 ) ;
X- VS->V_Blank_End = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x17 ) ;
X- VS->CRTC_Mode = inb( Target_Reg ) ;
X- outb( Base_Reg, 0x18 ) ;
X- VS->Line_Compare = inb( Target_Reg ) ;
X- /* Readjust Base Register */
X- Base_Reg -= 0x4 ;
X-
X- /* Sequencer Registers 03C4 & 03C5 */
X- /* VS->Seq_Addr_Reg = inb( 0x3C4 ) ; */ /* 03C4 -- SAME */
X- outb( 0x3C4, 0x00 ) ;
X- VS->Seq_Reset = inb( 0x3C5 ) ;
X- outb( 0x3C4, 0x01 ) ;
X- VS->Clock_Mode = inb( 0x3C5 ) ;
X- outb( 0x3C4, 0x02 ) ;
X- VS->Mask_Map = inb( 0x3C5 ) ;
X- outb( 0x3C4, 0x03 ) ;
X- VS->Char_Map_Select = inb( 0x3C5 ) ;
X- outb( 0x3C4, 0x04 ) ;
X- VS->Memory_Mode = inb( 0x3C5 ) ;
X-
X- /* Graphics Registers 03CE & 03CF */
X- /* VS->Graphics_Addr = inb( 0x3CE ) ; */ /* 03CE -- SAME */
X- /* ??????? */ /* 03CF -- SAME */
X- outb( 0x3CE, 0x00 ) ;
X- VS->Set_Reset = inb( 0x3CF ) ;
X- outb( 0x3CE, 0x01 ) ;
X- VS->Enb_Set_Reset = inb( 0x3CF ) ;
X- outb( 0x3CE, 0x02 ) ;
X- VS->Color_Compare = inb( 0x3CF ) ;
X- outb( 0x3CE, 0x03 ) ;
X- VS->Data_Rotate = inb( 0x3CF ) ;
X- outb( 0x3CE, 0x04 ) ;
X- VS->Read_Map_Select = inb( 0x3CF ) ;
X- outb( 0x3CE, 0x05 ) ;
X- VS->Graphics_Mode = inb( 0x3CF ) ;
X- outb( 0x3CE, 0x06 ) ;
X- VS->Miscellaneous = inb( 0x3CF ) ;
X- outb( 0x3CE, 0x07 ) ;
X- VS->Color_Dont_Care = inb( 0x3CF ) ;
X- outb( 0x3CE, 0x08 ) ;
X- VS->Bit_Mask = inb( 0x3CF ) ; /* Graphics_Addr == 08 */
X-
X- /* Video DAC Registers 03CE & 03CF */
X- VS->PEL_WR_Addr = inb( 0x3C8 ) ; /* 03C8 -- SAME */
X- /* PEL_RD_Addr is WRITE-ONLY */
X- VS->DAC_State = inb( 0x3C7 ) ; /* XXXX -- 03C7 */
X- VS->PEL_Data_Reg = inb( 0x3C9 ) ; /* 03C9 -- SAME */
X- VS->PEL_Mask_Reg = inb( 0x3C6 ) ;
X-
X- return ;
X- } ;
X
X void
X restore_vga_state( VS )
X register struct vga_video_hardware_state * const VS ;
X {
X! register IO_Address Base_Reg ; /* if mono == 0x3B0, if color == 3D0 */
X! register IO_Address Target_Reg ;
X
X! /* Setup I/O Base Address */
X! Base_Reg = ( VS->Misc_Output_Reg & 1 ) ? 0x3D0 : 0x3B0 ;
X!
X! /* Sequencer Registers 03C4 & 03C5 */
X! /* Do Hardware Syncronous RESET */
X! SetVideoSequencer( Seq_ResetIndex, VS->Seq_Reset & 0xFD ) ;
X! SetVideoSequencer( Clock_ModeIndex, VS->Clock_Mode ) ;
X! SetVideoSequencer( Mask_MapIndex, VS->Mask_Map ) ;
X! SetVideoSequencer( Char_Map_SelectIndex, VS->Char_Map_Select ) ;
X! SetVideoSequencer( Memory_ModeIndex, VS->Memory_Mode ) ;
X!
X! /* Write General Registers */
X! outb( 0x3C2, VS->Misc_Output_Reg ) ;
X! /* VS->Input_Status_0 & VS->Input_Status_1 are READ-ONLY */
X! outb( Base_Reg + 0xA, VS->Feature_Control ) ;
X! outb( 0x3C3, VS->Video_Enable ) ;
X!
X! /* Attribute Registers */
X! /* Initialize Flip-Flop */
X! { register tmp = inb( Base_Reg + 0xA ) ; }
X
X! /* Target_Reg Used As Scrap */
X! for ( Target_Reg = 0 ; Target_Reg <= 0xF ; Target_Reg++ ) {
X SetVideoAttribute( Target_Reg, VS->Palette[Target_Reg] ) ;
X }
X- SetVideoAttribute( AttributeModeIndex, VS->Attr_Mode ) ;
X- SetVideoAttribute( OverScanColorIndex, VS->Overscan_Color ) ;
X- SetVideoAttribute( ColorPlaneEnableIndex, VS->Color_Plane_En ) ;
X- SetVideoAttribute( HorizPelPanIndex, VS->Horiz_PEL_Pan ) ;
X- SetVideoAttribute( ColorSelectIndex, VS->Color_Select ) ;
X-
X- /* Enable CRT Controller Registers 0-7 */
X- outb( Target_Reg = ( Base_Reg += 0x4 ), 0x11 ) ;
X- outb( ++Target_Reg, 0x0C ) ;
X- /* Restore Crt Controller Registers 03?4 & 03?5 */
X- outb( Base_Reg, 0x00 ) ;
X- outb( Target_Reg, VS->Horiz_Total ) ;
X- outb( Base_Reg, 0x01 ) ;
X- outb( Target_Reg, VS->Horiz_End ) ;
X- outb( Base_Reg, 0x02 ) ;
X- outb( Target_Reg, VS->H_Blank_Start ) ;
X- outb( Base_Reg, 0x03 ) ;
X- outb( Target_Reg, VS->H_Blank_End ) ;
X- outb( Base_Reg, 0x04 ) ;
X- outb( Target_Reg, VS->H_Retrace_Start ) ;
X- outb( Base_Reg, 0x05 ) ;
X- outb( Target_Reg, VS->H_Retrace_End ) ;
X- outb( Base_Reg, 0x06 ) ;
X- outb( Target_Reg, VS->Vert_Total ) ;
X- outb( Base_Reg, 0x07 ) ;
X- outb( Target_Reg, VS->Overflow ) ;
X- outb( Base_Reg, 0x08 ) ;
X- outb( Target_Reg, VS->Preset_Row_Scan ) ;
X- outb( Base_Reg, 0x09 ) ;
X- outb( Target_Reg, VS->Max_Scan_Line ) ;
X- outb( Base_Reg, 0x0A ) ;
X- outb( Target_Reg, VS->Cursor_Start ) ;
X- outb( Base_Reg, 0x0B ) ;
X- outb( Target_Reg, VS->Cursor_End ) ;
X- outb( Base_Reg, 0x0C ) ;
X- outb( Target_Reg, VS->Start_Addr_Hi ) ;
X- outb( Base_Reg, 0x0D ) ;
X- outb( Target_Reg, VS->Start_Addr_Lo ) ;
X- outb( Base_Reg, 0x0E ) ;
X- outb( Target_Reg, VS->Cursor_Loc_Hi ) ;
X- outb( Base_Reg, 0x0F ) ;
X- outb( Target_Reg, VS->Cursor_Loc_Lo ) ;
X- outb( Base_Reg, 0x10 ) ;
X- outb( Target_Reg, VS->V_Retrace_Start ) ;
X- outb( Base_Reg, 0x11 ) ;
X- outb( Target_Reg, VS->V_Retrace_End ) ;
X- outb( Base_Reg, 0x12 ) ;
X- outb( Target_Reg, VS->V_Display_End ) ;
X- outb( Base_Reg, 0x13 ) ;
X- outb( Target_Reg, VS->Underline_Loc ) ;
X- outb( Base_Reg, 0x14 ) ;
X- outb( Target_Reg, VS->Offset ) ;
X- outb( Base_Reg, 0x15 ) ;
X- outb( Target_Reg, VS->V_Blank_Start ) ;
X- outb( Base_Reg, 0x16 ) ;
X- outb( Target_Reg, VS->V_Blank_End ) ;
X- outb( Base_Reg, 0x17 ) ;
X- outb( Target_Reg, VS->CRTC_Mode ) ;
X- outb( Base_Reg, 0x18 ) ;
X- outb( Target_Reg, VS->Line_Compare ) ;
X-
X- /* Restore Graphics Registers 03CE & 03CF */
X- SetVideoGraphics( Set_ResetIndex, VS->Set_Reset ) ;
X- SetVideoGraphics( Enb_Set_ResetIndex, VS->Enb_Set_Reset ) ;
X- SetVideoGraphics( Color_CompareIndex, VS->Color_Compare ) ;
X- SetVideoGraphics( Data_RotateIndex, VS->Data_Rotate ) ;
X- SetVideoGraphics( Read_Map_SelectIndex, VS->Read_Map_Select ) ;
X- SetVideoGraphics( Graphics_ModeIndex, VS->Graphics_Mode ) ;
X- SetVideoGraphics( MiscellaneousIndex, VS->Miscellaneous ) ;
X- SetVideoGraphics( Color_Dont_CareIndex, VS->Color_Dont_Care ) ;
X- SetVideoGraphics( Bit_MaskIndex, VS->Bit_Mask ) ; /* Graphics_Addr == 08 */
X-
X- /* Restore ?? Video DAC Registers 03C7 & 03C8 */
X- outb( 0x3C9, VS->PEL_Data_Reg ) ; /* 03C9 -- SAME */
X- outb( 0x3C6, VS->PEL_Mask_Reg ) ;
X-
X- /* Re-Enable Hardware i.e. Reset Register */
X- SetVideoSequencer( Seq_ResetIndex, VS->Seq_Reset | 0x03 ) ;
X
X- return ;
X- } ;
X-
X void
X vgaSetColor( color, r, g, b )
X register unsigned long int color ;
X register short r, b, g ;
X {
X! outb( 0x3C8, color ) ; /* Point PEL Address Register To Color Entry */
X! outb( 0x3C9, r >> 10 ) ;
X! outb( 0x3C9, g >> 10 ) ;
X! outb( 0x3C9, b >> 10 ) ;
X!
X! return ;
X }
X
X void
X--- 33,303 ----
X ******* EVERYTHING
X */
X
X+ #define INTS_OFF() inb(0x3da); outb(0x3c0, 0)
X+ #define INTS_ON() inb(0x3da); outb(0x3c0, 0x20)
X+
X void
X save_vga_state( VS )
X register struct vga_video_hardware_state *VS ;
X {
X! register IO_Address Target_Reg ; /* if mono == 0x3B0, if color == 3D0 */
X! register IO_Address Base_Reg ; /* if mono == 0x3B0, if color == 3D0 */
X
X! /* Read General Registers */
X! VS->Feature_Control = inb( 0x3CA ) ;
X! VS->Video_Enable = inb( 0x3C3 ) ;
X! Base_Reg = ( ( VS->Misc_Output_Reg = inb( 0x3CC ) ) & 1 ) ? 0x3D0 : 0x3B0 ;
X! VS->Input_Status_0 = inb( 0x3C2 ) ;
X! /* Initialize Flip-Flop */
X! VS->Input_Status_1 = inb( Base_Reg + 0xA ) ;
X!
X! /* Save Attribute Registers 03C0 & 03C1 */
X!
X! INTS_OFF() ;
X
X! VS->Attr_Addr_Reg = inb( 0x3C0 ) ; /* Save Existing Index First */
X! /* Target_Reg Used As Scrap */
X! inb(0x3da);
X! for ( Target_Reg = 0 ; Target_Reg <= 0xF ; Target_Reg++ ) {
X outb( 0x3C0, (unsigned char) Target_Reg ) ;
X! outb( 0x3c0, ( VS->Palette[Target_Reg] = inb( 0x3C1) ) );
X! }
X! outb( 0x3c0, 0x30 ) ;
X! outb( 0x3c0, ( VS->Attr_Mode = inb( 0x3C1 ) ) ) ;
X! outb( 0x3c0, 0x31 ) ;
X! outb( 0x3c0, ( VS->Overscan_Color = inb( 0x3C1 ) ) ) ;
X! outb( 0x3c0, 0x32 ) ;
X! outb( 0x3c0, ( VS->Color_Plane_En = inb( 0x3C1 ) ) ) ;
X! outb( 0x3c0, 0x33 ) ;
X! outb( 0x3c0, ( VS->Horiz_PEL_Pan = inb( 0x3C1 ) ) ) ;
X! outb( 0x3c0, 0x34 ) ;
X! outb( 0x3c0, ( VS->Color_Select = inb( 0x3C1 ) ) ) ; /* Attr_Addr_Reg == 14 */
X! /* Re-Enable Video Access To The Color Palette */
X!
X! INTS_ON() ;
X!
X! /* Save Crt Controller Registers 03?4 & 03?5 */
X! VS->Index_Reg = inb( Target_Reg = ( Base_Reg += 0x4 ) ) ;
X! outb( Base_Reg, 0x00 ) ;
X! VS->Horiz_Total = inb( ++Target_Reg ) ;
X! outb( Base_Reg, 0x01 ) ;
X! VS->Horiz_End = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x02 ) ;
X! VS->H_Blank_Start = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x03 ) ;
X! VS->H_Blank_End = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x04 ) ;
X! VS->H_Retrace_Start = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x05 ) ;
X! VS->H_Retrace_End = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x06 ) ;
X! VS->Vert_Total = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x07 ) ;
X! VS->Overflow = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x08 ) ;
X! VS->Preset_Row_Scan = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x09 ) ;
X! VS->Max_Scan_Line = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x0A ) ;
X! VS->Cursor_Start = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x0B ) ;
X! VS->Cursor_End = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x0C ) ;
X! VS->Start_Addr_Hi = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x0D ) ;
X! VS->Start_Addr_Lo = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x0E ) ;
X! VS->Cursor_Loc_Hi = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x0F ) ;
X! VS->Cursor_Loc_Lo = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x10 ) ;
X! VS->V_Retrace_Start = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x11 ) ;
X! VS->V_Retrace_End = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x12 ) ;
X! VS->V_Display_End = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x13 ) ;
X! VS->Underline_Loc = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x14 ) ;
X! VS->Offset = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x15 ) ;
X! VS->V_Blank_Start = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x16 ) ;
X! VS->V_Blank_End = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x17 ) ;
X! VS->CRTC_Mode = inb( Target_Reg ) ;
X! outb( Base_Reg, 0x18 ) ;
X! VS->Line_Compare = inb( Target_Reg ) ;
X! /* Readjust Base Register */
X! Base_Reg -= 0x4 ;
X!
X! /* Sequencer Registers 03C4 & 03C5 */
X! /* VS->Seq_Addr_Reg = inb( 0x3C4 ) ; */ /* 03C4 -- SAME */
X! outb( 0x3C4, 0x00 ) ;
X! VS->Seq_Reset = inb( 0x3C5 ) ;
X! outb( 0x3C4, 0x01 ) ;
X! VS->Clock_Mode = inb( 0x3C5 ) ;
X! outb( 0x3C4, 0x02 ) ;
X! VS->Mask_Map = inb( 0x3C5 ) ;
X! outb( 0x3C4, 0x03 ) ;
X! VS->Char_Map_Select = inb( 0x3C5 ) ;
X! outb( 0x3C4, 0x04 ) ;
X! VS->Memory_Mode = inb( 0x3C5 ) ;
X!
X! /* Graphics Registers 03CE & 03CF */
X! /* VS->Graphics_Addr = inb( 0x3CE ) ; */ /* 03CE -- SAME */
X! /* ??????? */ /* 03CF -- SAME */
X! outb( 0x3CE, 0x00 ) ;
X! VS->Set_Reset = inb( 0x3CF ) ;
X! outb( 0x3CE, 0x01 ) ;
X! VS->Enb_Set_Reset = inb( 0x3CF ) ;
X! outb( 0x3CE, 0x02 ) ;
X! VS->Color_Compare = inb( 0x3CF ) ;
X! outb( 0x3CE, 0x03 ) ;
X! VS->Data_Rotate = inb( 0x3CF ) ;
X! outb( 0x3CE, 0x04 ) ;
X! VS->Read_Map_Select = inb( 0x3CF ) ;
X! outb( 0x3CE, 0x05 ) ;
X! VS->Graphics_Mode = inb( 0x3CF ) ;
X! outb( 0x3CE, 0x06 ) ;
X! VS->Miscellaneous = inb( 0x3CF ) ;
X! outb( 0x3CE, 0x07 ) ;
X! VS->Color_Dont_Care = inb( 0x3CF ) ;
X! outb( 0x3CE, 0x08 ) ;
X! VS->Bit_Mask = inb( 0x3CF ) ; /* Graphics_Addr == 08 */
X!
X! /* Video DAC Registers 03CE & 03CF */
X! VS->PEL_WR_Addr = inb( 0x3C8 ) ; /* 03C8 -- SAME */
X! /* PEL_RD_Addr is WRITE-ONLY */
X! VS->DAC_State = inb( 0x3C7 ) ; /* XXXX -- 03C7 */
X! VS->PEL_Data_Reg = inb( 0x3C9 ) ; /* 03C9 -- SAME */
X! VS->PEL_Mask_Reg = inb( 0x3C6 ) ;
X }
X
X void
X restore_vga_state( VS )
X register struct vga_video_hardware_state * const VS ;
X {
X! register IO_Address Base_Reg ; /* if mono == 0x3B0, if color == 3D0 */
X! register IO_Address Target_Reg ;
X
X! /* Setup I/O Base Address */
X! Base_Reg = ( VS->Misc_Output_Reg & 1 ) ? 0x3D0 : 0x3B0 ;
X!
X! /* Sequencer Registers 03C4 & 03C5 */
X! /* Do Hardware Syncronous RESET */
X! SetVideoSequencer( Seq_ResetIndex, VS->Seq_Reset & 0xFD ) ;
X! SetVideoSequencer( Clock_ModeIndex, VS->Clock_Mode ) ;
X! SetVideoSequencer( Mask_MapIndex, VS->Mask_Map ) ;
X! SetVideoSequencer( Char_Map_SelectIndex, VS->Char_Map_Select ) ;
X! SetVideoSequencer( Memory_ModeIndex, VS->Memory_Mode ) ;
X!
X! /* Write General Registers */
X! outb( 0x3C2, VS->Misc_Output_Reg ) ;
X! /* VS->Input_Status_0 & VS->Input_Status_1 are READ-ONLY */
X! outb( Base_Reg + 0xA, VS->Feature_Control ) ;
X! outb( 0x3C3, VS->Video_Enable ) ;
X!
X! /* Attribute Registers */
X! /* Initialize Flip-Flop */
X! {
X! register tmp = inb( Base_Reg + 0xA ) ;
X! }
X
X! /* Target_Reg Used As Scrap */
X! inb(0x3da);
X! for ( Target_Reg = 0 ; Target_Reg <= 0xF ; Target_Reg++ ) {
X SetVideoAttribute( Target_Reg, VS->Palette[Target_Reg] ) ;
X+ }
X+ SetVideoAttribute( AttributeModeIndex, VS->Attr_Mode ) ;
X+ SetVideoAttribute( OverScanColorIndex, VS->Overscan_Color ) ;
X+ SetVideoAttribute( ColorPlaneEnableIndex, VS->Color_Plane_En ) ;
X+ SetVideoAttribute( HorizPelPanIndex, VS->Horiz_PEL_Pan ) ;
X+ SetVideoAttribute( ColorSelectIndex, VS->Color_Select ) ;
X+
X+ /* Enable CRT Controller Registers 0-7 */
X+ outb( Target_Reg = ( Base_Reg += 0x4 ), 0x11 ) ;
X+ outb( ++Target_Reg, 0x0C ) ;
X+ /* Restore Crt Controller Registers 03?4 & 03?5 */
X+ outb( Base_Reg, 0x00 ) ;
X+ outb( Target_Reg, VS->Horiz_Total ) ;
X+ outb( Base_Reg, 0x01 ) ;
X+ outb( Target_Reg, VS->Horiz_End ) ;
X+ outb( Base_Reg, 0x02 ) ;
X+ outb( Target_Reg, VS->H_Blank_Start ) ;
X+ outb( Base_Reg, 0x03 ) ;
X+ outb( Target_Reg, VS->H_Blank_End ) ;
X+ outb( Base_Reg, 0x04 ) ;
X+ outb( Target_Reg, VS->H_Retrace_Start ) ;
X+ outb( Base_Reg, 0x05 ) ;
X+ outb( Target_Reg, VS->H_Retrace_End ) ;
X+ outb( Base_Reg, 0x06 ) ;
X+ outb( Target_Reg, VS->Vert_Total ) ;
X+ outb( Base_Reg, 0x07 ) ;
X+ outb( Target_Reg, VS->Overflow ) ;
X+ outb( Base_Reg, 0x08 ) ;
X+ outb( Target_Reg, VS->Preset_Row_Scan ) ;
X+ outb( Base_Reg, 0x09 ) ;
X+ outb( Target_Reg, VS->Max_Scan_Line ) ;
X+ outb( Base_Reg, 0x0A ) ;
X+ outb( Target_Reg, VS->Cursor_Start ) ;
X+ outb( Base_Reg, 0x0B ) ;
X+ outb( Target_Reg, VS->Cursor_End ) ;
X+ outb( Base_Reg, 0x0C ) ;
X+ outb( Target_Reg, VS->Start_Addr_Hi ) ;
X+ outb( Base_Reg, 0x0D ) ;
X+ outb( Target_Reg, VS->Start_Addr_Lo ) ;
X+ outb( Base_Reg, 0x0E ) ;
X+ outb( Target_Reg, VS->Cursor_Loc_Hi ) ;
X+ outb( Base_Reg, 0x0F ) ;
X+ outb( Target_Reg, VS->Cursor_Loc_Lo ) ;
X+ outb( Base_Reg, 0x10 ) ;
X+ outb( Target_Reg, VS->V_Retrace_Start ) ;
X+ outb( Base_Reg, 0x11 ) ;
X+ outb( Target_Reg, VS->V_Retrace_End ) ;
X+ outb( Base_Reg, 0x12 ) ;
X+ outb( Target_Reg, VS->V_Display_End ) ;
X+ outb( Base_Reg, 0x13 ) ;
X+ outb( Target_Reg, VS->Underline_Loc ) ;
X+ outb( Base_Reg, 0x14 ) ;
X+ outb( Target_Reg, VS->Offset ) ;
X+ outb( Base_Reg, 0x15 ) ;
X+ outb( Target_Reg, VS->V_Blank_Start ) ;
X+ outb( Base_Reg, 0x16 ) ;
X+ outb( Target_Reg, VS->V_Blank_End ) ;
X+ outb( Base_Reg, 0x17 ) ;
X+ outb( Target_Reg, VS->CRTC_Mode ) ;
X+ outb( Base_Reg, 0x18 ) ;
X+ outb( Target_Reg, VS->Line_Compare ) ;
X+
X+ /* Restore Graphics Registers 03CE & 03CF */
X+ SetVideoGraphics( Set_ResetIndex, VS->Set_Reset ) ;
X+ SetVideoGraphics( Enb_Set_ResetIndex, VS->Enb_Set_Reset ) ;
X+ SetVideoGraphics( Color_CompareIndex, VS->Color_Compare ) ;
X+ SetVideoGraphics( Data_RotateIndex, VS->Data_Rotate ) ;
X+ SetVideoGraphics( Read_Map_SelectIndex, VS->Read_Map_Select ) ;
X+ SetVideoGraphics( Graphics_ModeIndex, VS->Graphics_Mode ) ;
X+ SetVideoGraphics( MiscellaneousIndex, VS->Miscellaneous ) ;
X+ SetVideoGraphics( Color_Dont_CareIndex, VS->Color_Dont_Care ) ;
X+ SetVideoGraphics( Bit_MaskIndex, VS->Bit_Mask ) ; /* Graphics_Addr == 08 */
X+
X+ /* Restore ?? Video DAC Registers 03C7 & 03C8 */
X+ outb( 0x3C9, VS->PEL_Data_Reg ) ; /* 03C9 -- SAME */
X+ outb( 0x3C6, VS->PEL_Mask_Reg ) ;
X+
X+ /* Re-Enable Hardware i.e. Reset Register */
X+ SetVideoSequencer( Seq_ResetIndex, VS->Seq_Reset | 0x03 ) ;
X }
X
X void
X vgaSetColor( color, r, g, b )
X register unsigned long int color ;
X register short r, b, g ;
X {
X! outb( 0x3C8, color ) ; /* Point PEL Address Register To Color Entry */
X! outb( 0x3C9, r >> 10 ) ;
X! outb( 0x3C9, g >> 10 ) ;
X! outb( 0x3C9, b >> 10 ) ;
X }
X
X void
X***************
X*** 305,317 ****
X save_dac( tablePtr )
X register DAC_TABLE tablePtr ;
X {
X! register int i ;
X! register unsigned char *cptr ;
X
X! outb( 0x3C7, 0x0 ) ; /* Point PEL Address Register To First Entry */
X! for ( i = 768, cptr = (unsigned char *) tablePtr ; --i ; )
X *cptr++ = inb( 0x03C9 ) ;
X- return ;
X }
X
X void
X--- 304,315 ----
X save_dac( tablePtr )
X register DAC_TABLE tablePtr ;
X {
X! register int i ;
X! register unsigned char *cptr ;
X
X! outb( 0x3C7, 0x0 ) ; /* Point PEL Address Register To First Entry */
X! for ( i = 768, cptr = (unsigned char *) tablePtr ; --i ; )
X *cptr++ = inb( 0x03C9 ) ;
X }
X
X void
X***************
X*** 318,522 ****
X restore_dac( tablePtr )
X register DAC_TABLE tablePtr ;
X {
X! register int i ;
X! register unsigned char *cptr ;
X
X! outb( 0x3C8, 0x0 ) ; /* Point PEL Address Register To First Entry */
X! for ( i = 768, cptr = (unsigned char *) tablePtr ; --i ; )
X outb( 0x03C9, *cptr++ ) ;
X- return ;
X }
X
X! /*
X! * Initialize the vga to 640 x 480, 16 of 64 colors @ a0000
X! OR -- Initialize the vga to 720 x 540, 16 of 64 colors @ a0000
X! */
X
X void
X! set_graphics_mode( VS )
X register struct vga_video_hardware_state *VS ;
X {
X! /* Setup I/O Base Address */
X! /* Color 640 by 480 -- 16 Color
X! OR - Color 720 by 540 -- 16 Color */
X! #define Color_Base_Reg ( 0x3D0 )
X
X! /* Sequencer Registers 03C4 & 03C5 */
X! SetVideoSequencer( Seq_ResetIndex, 0x01 ) ; /* Syncronous RESET */
X! SetVideoSequencer( Clock_ModeIndex, 0x01 ) ;
X! /* Make All Planes Writable */
X! SetVideoSequencer( Mask_MapIndex, VGA_ALLPLANES ) ;
X! SetVideoSequencer( Char_Map_SelectIndex, 0x00 ) ;
X! SetVideoSequencer( Memory_ModeIndex, 0x06 ) ;
X!
X! /* Write General Registers */
X! /* VS.Input_Status_0 & VS.Input_Status_1 are READ-ONLY */
X! #ifndef VGA720
X! outb( 0x3C2, /* VS.Misc_Output_Reg */ 0xE3 ) ; /* VS.Misc_Output_Reg */
X! #else /* VGA720 */
X! outb( 0x3C2, 0xE7 ) ; /* VS.Misc_Output_Reg */ /* XXX */
X! #endif
X! outb( Color_Base_Reg + 0xA, VS->Feature_Control ) ;
X! outb( 0x3C3, /* VS.Video_Enable */ 0x1 ) ;
X!
X! /* Re-Enable Hardware i.e. Reset Register */
X! outb( 0x3C4, 0x00 ) ;
X! outb( 0x3C5, /* VS.Seq_Reset */ 0x03 ) ; /* Enable Hardware Reset Register */
X
X! /* Attribute Registers */
X! /*
X! INTS_OFF() ;
X! */
X! /* Initialize Flip-Flop */
X! { register tmp = inb( Color_Base_Reg + 0xA ) ; }
X
X! /* Set Palette Register Value Equal To Palette Register Index Number */
X! /* i.e. Palette is 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F */
X {
X register IO_Address Target_Reg ;
X for ( Target_Reg = 0 ; Target_Reg <= 0xF ; Target_Reg++ ) {
X! SetVideoAttribute( Target_Reg, Target_Reg ) ;
X }
X! }
X! /* Rest Of The Attribute Registers */
X! /* Note: 0x20 is added to the index
X! * to Re-Enable Video Access To The Color Palette */
X! /* VS.Attr_Mode - P4,P5 for color select */
X! SetVideoAttribute( AttributeModeIndex, 0x81 ) ;
X! SetVideoAttribute( OverScanColorIndex, 0x00 ) ;
X! SetVideoAttribute( ColorPlaneEnableIndex, VGA_ALLPLANES ) ;
X! SetVideoAttribute( HorizPelPanIndex, 0x00 ) ;
X! SetVideoAttribute( ColorSelectIndex, 0x00 ) ;
X!
X! /* Enable CRT Controller Registers 0-7 */
X! outb( 0x3D4, 0x11 ) ;
X! outb( 0x3D5, 0x0C ) ;
X! /* Set CRT Controller Registers 03?4 & 03?5 */
X! outb( 0x3D4, 0x00 ) ;
X! #ifndef VGA720
X! outb( 0x3D5, 95 ) ; /* VS.Horiz_Total */
X! #else /* VGA720 */
X! outb( 0x3D5, 105 ) ; /* VS.Horiz_Total */ /* XXX */
X! #endif
X! outb( 0x3D4, 0x01 ) ;
X! #ifndef VGA720
X! outb( 0x3D5, 79 ) ; /* VS.Horiz_End */
X! #else /* VGA720 */
X! outb( 0x3D5, 89 ) ; /* VS.Horiz_End */ /* XXX */
X! #endif
X! outb( 0x3D4, 0x02 ) ;
X! #ifndef VGA720
X! outb( 0x3D5, 0x50 ) ; /* VS.H_Blank_Start */
X! #else /* VGA720 */
X! outb( 0x3D5, 0x5A ) ; /* VS.H_Blank_Start */ /* XXX */
X! #endif
X! outb( 0x3D4, 0x03 ) ;
X! #ifndef VGA720
X! outb( 0x3D5, /* VS.H_Blank_End */ 0x82 ) ;
X! #else /* VGA720 */
X! outb( 0x3D5, 0x8A ) ; /* VS.H_Blank_End */ /* XXX */
X! #endif
X! outb( 0x3D4, 0x04 ) ;
X! #ifndef VGA720
X! outb( 0x3D5, /* VS.H_Retrace_Start */ 0x54 ) ;
X! #else /* VGA720 */
X! outb( 0x3D5, 0x5C ) ; /* VS.H_Retrace_Start */ /* XXX */
X! #endif
X! outb( 0x3D4, 0x05 ) ;
X! #ifndef VGA720
X! outb( 0x3D5, /* VS.H_Retrace_End */ 0x80 ) ;
X! #else /* VGA720 */
X! outb( 0x3D5, 0x88 ) ; /* VS.H_Retrace_End */
X! #endif
X! outb( 0x3D4, 0x06 ) ;
X! #ifndef VGA720
X! outb( 0x3D5, /* VS.Vert_Total */ 0x0B ) ;
X! #else /* VGA720 */
X! outb( 0x3D5, /* VS.Vert_Total */ 0x4F ) ; /* XXX */
X! #endif
X! outb( 0x3D4, 0x07 ) ;
X! #ifndef VGA720
X! outb( 0x3D5, /* VS.Overflow */ 0x3E ) ;
X! #else /* VGA720 */
X! outb( 0x3D5, /* VS.Overflow */ 0xF0 ) ; /* XXX */
X! #endif
X! outb( 0x3D4, 0x08 ) ;
X! outb( 0x3D5, /* VS.Preset_Row_Scan */ 0 ) ;
X! outb( 0x3D4, 0x09 ) ;
X! #ifndef VGA720
X! outb( 0x3D5, /* VS.Max_Scan_Line */ 0x40 ) ;
X! #else /* VGA720 */
X! outb( 0x3D5, /* VS.Max_Scan_Line */ 0x60 ) ; /* XXX */
X! #endif
X! outb( 0x3D4, 0x0A ) ;
X! outb( 0x3D5, /* VS.Cursor_Start */ 0 ) ;
X! outb( 0x3D4, 0x0B ) ;
X! outb( 0x3D5, /* VS.Cursor_End */ 0 ) ;
X! outb( 0x3D4, 0x0C ) ;
X! outb( 0x3D5, /* VS.Start_Addr_Hi */ 0 ) ;
X! outb( 0x3D4, 0x0D ) ;
X! outb( 0x3D5, /* VS.Start_Addr_Lo */ 0 ) ;
X! outb( 0x3D4, 0x0E ) ;
X! outb( 0x3D5, /* VS.Cursor_Loc_Hi */ 0 ) ;
X! outb( 0x3D4, 0x0F ) ;
X! outb( 0x3D5, /* VS.Cursor_Loc_Lo */ 0 ) ;
X! outb( 0x3D4, 0x10 ) ;
X! #ifndef VGA720
X! outb( 0x3D5, /* VS.V_Retrace_Start */ 234 ) ;
X! #else /* VGA720 */
X! outb( 0x3D5, /* VS.V_Retrace_Start */ 32 ) ; /* XXX */
X! #endif
X! outb( 0x3D4, 0x11 ) ;
X! outb( 0x3D5, /* VS.V_Retrace_End */ 0x8C ) ;
X! outb( 0x3D4, 0x12 ) ;
X! #ifndef VGA720
X! outb( 0x3D5, /* VS.V_Display_End */ 223 ) ;
X! #else /* VGA720 */
X! outb( 0x3D5, /* VS.V_Display_End */ 27 ) ; /* XXX */
X! #endif
X! outb( 0x3D4, 0x13 ) ;
X! #ifndef VGA720
X! outb( 0x3D5, /* VS.Underline_Loc */ 40 ) ;
X! #else /* VGA720 */
X! outb( 0x3D5, /* VS.Offset */ 45 ) ; /* XXX */
X! #endif
X! outb( 0x3D4, 0x14 ) ;
X! #ifndef VGA720
X! outb( 0x3D5, /* VS.Offset */ 0 ) ;
X! #else /* VGA720 */
X! outb( 0x3D5, /* VS.Underline_Loc */ 0 ) ;
X! #endif
X! outb( 0x3D4, 0x15 ) ;
X! #ifndef VGA720
X! outb( 0x3D5, /* VS.V_Blank_Start */ 231 ) ;
X! #else /* VGA720 */
X! outb( 0x3D5, /* VS.V_Blank_Start */ 35 ) ; /* XXX */
X! #endif
X! outb( 0x3D4, 0x16 ) ;
X! #ifndef VGA720
X! outb( 0x3D5, /* VS.V_Blank_End */ 4 ) ;
X! #else /* VGA720 */
X! outb( 0x3D5, /* VS.V_Blank_End */ 2 ) ;
X! #endif
X! outb( 0x3D4, 0x17 ) ;
X! outb( 0x3D5, /* VS.CRTC_Mode */ 0xE3 ) ;
X! outb( 0x3D4, 0x18 ) ;
X! outb( 0x3D5, /* VS.Line_Compare */ 255 ) ;
X!
X! /* Set Graphics Registers 03CE & 03CF */
X! SetVideoGraphics( Set_ResetIndex, 0x00 ) ;
X! SetVideoGraphics( Enb_Set_ResetIndex, 0x00 ) ;
X! SetVideoGraphics( Color_CompareIndex, 0x00 ) ;
X! SetVideoGraphics( Data_RotateIndex, 0x00 ) ;
X! SetVideoGraphics( Read_Map_SelectIndex, 0x00 ) ;
X! SetVideoGraphics( Graphics_ModeIndex, VGA_WRITE_MODE_2 ) ;
X! SetVideoGraphics( MiscellaneousIndex, 0x05 ) ;
X! SetVideoGraphics( Color_Dont_CareIndex, VGA_ALLPLANES ) ;
X! SetVideoGraphics( Bit_MaskIndex, 0xFF ) ; /* All Bits Writable */
X!
X! /* Video DAC Registers 03C7 & 03C8 */
X! outb( 0x3C9, VS->PEL_Data_Reg ) ; /* 03C9 -- SAME */
X! outb( 0x3C6, VS->PEL_Mask_Reg ) ;
X
X! return ;
X }
X--- 316,673 ----
X restore_dac( tablePtr )
X register DAC_TABLE tablePtr ;
X {
X! register int i ;
X! register unsigned char *cptr ;
X
X! outb( 0x3C8, 0x0 ) ; /* Point PEL Address Register To First Entry */
X! for ( i = 768, cptr = (unsigned char *) tablePtr ; --i ; )
X outb( 0x03C9, *cptr++ ) ;
X }
X
X! static
X! outv(n, addr, indx, v)
X! int n;
X! int addr;
X! int indx;
X! register unsigned char *v;
X! {
X! register int i;
X!
X! for (i=0; i<n; i++) {
X! outb(addr, i);
X! outb(indx, *v++);
X! }
X! }
X
X void
X! set_graphics_mode_640_480 ( VS )
X register struct vga_video_hardware_state *VS ;
X {
X! int i;
X! static unsigned char seq[]={
X! 0x01, 0x01, 0x0f, 0x00, 0x06,
X! };
X! static unsigned char crtc[]={
X! 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
X! 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
X! 0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3,
X! 0xff,
X! };
X! static unsigned char grc[]={
X! 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x05, 0x0f, 0xff,
X! };
X! static unsigned char attr[]={
X! 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
X! 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
X! 0x81, 0x00, 0x0f, 0x00, 0x00,
X! };
X!
X! outv(5, 0x3c4, 0x3c5, seq); /* reset, sequencer regs */
X!
X! outb(0x3c2, 0xe3); /* misc out reg */
X! outb(0x3c3, 0x01); /* VS.Video_Enable */
X! outb(0x3c4, 0); outb(0x3c5, 3); /* enable sequencer */
X!
X! inb(0x3da); outb(0x3c0,0); /* disable palette */
X!
X! inb(0x3da); /* reset attribute f/f */
X! outv(21, 0x3c0, 0x3c0, attr);
X!
X! outb(0x3d4, 0x11); outb(0x3d5, 0); /* unprotect crtc regs 0-7 */
X! outv(25, 0x3d4, 0x3d5, crtc);
X!
X! outv(9, 0x3ce, 0x3cf, grc);
X!
X! outb(0x3c0, 0x20); /* enable pallette */
X! }
X
X! void
X! set_graphics_mode_800_600 ( VS )
X! register struct vga_video_hardware_state *VS ;
X! {
X! int i;
X! static unsigned char seq[]={
X! 0x01, 0x01, 0x0f, 0x00, 0x06,
X! };
X! static unsigned char crtc[]={
X! /* 0x7d, 0x63, 0x6b, 0x80, 0x6c, 0x1d, 0x77, 0xf0, */
X! 0x85, 0x63, 0x65, 0x88, 0x66, 0x17, 0x77, 0xf0,
X! 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
X! 0x5c, 0x0e, 0x57, 0x32, 0x00, 0x5c, 0x74, 0xe3,
X! 0xff,
X! };
X! static unsigned char grc[]={
X! 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x05, 0x0f, 0xff,
X! };
X! static unsigned char attr[]={
X! 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
X! 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
X! 0x01, 0x00, 0x0f, 0x00, 0x00,
X! };
X!
X! outb(0x3c4, 6); outb(0x3c5, 0xea); /* enable extended seq regs */
X!
X! outv(5, 0x3c4, 0x3c5, seq); /* reset, sequencer regs */
X!
X! outb(0x3c2, 0xe3); /* misc out reg */
X! outb(0x3c3, 0x01); /* VS.Video_Enable */
X! outb(0x3c4, 0xa4); outb(0x3c5, 0x10); /* extended sequencer regs */
X! outb(0x3c4, 0xfd); outb(0x3c5, 0x90);
X! outb(0x3c4, 0xfc); outb(0x3c5, 0x08);
X! outb(0x3c4, 0xf6); outb(0x3c5, 0x00);
X! outb(0x3c4, 0xf8); outb(0x3c5, 0x10);
X! outb(0x3c4, 0xff); outb(0x3c5, 0x00);
X! outb(0x3c4, 0xe0); outb(0x3c5, 0x00);
X! outb(0x3c4, 0); outb(0x3c5, 3); /* enable sequencer */
X!
X! outb(0x3c4, 6); outb(0x3c5, 0xea); /* enable extended seq regs */
X!
X! outb(0x3d4, 0x11); outb(0x3d5, 0x20); /* unprotect crtc regs 0-7 */
X! outv(25, 0x3d4, 0x3d5, crtc);
X!
X! outv(9, 0x3ce, 0x3cf, grc);
X!
X! inb(0x3da); outb(0x3c0,0); /* disable palette */
X!
X! inb(0x3da); /* reset attribute f/f */
X! outv(21, 0x3c0, 0x3c0, attr);
X!
X! outb(0x3c6, 0xff); /* palette mask */
X! outb(0x3c0, 0x20); /* enable pallette */
X! outb(0x3c4, 6); outb(0x3c5, 0xae); /* protect extended regs */
X! }
X!
X! void
X! set_graphics_mode_1024_768 ( VS )
X! struct vga_video_hardware_state *VS ;
X! {
X! int i;
X! static unsigned char seq[]={
X! 0x01, 0x01, 0x0f, 0x00, 0x06,
X! };
X! static unsigned char crtc[]={
X! 0xa3, 0x7f, 0x82, 0xa6, 0x8d, 0x82, 0x29, 0xfd,
X! 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
X! 0x07, 0x8a, 0xff, 0x40, 0x00, 0x07, 0x22, 0xe3,
X! 0xff,
X! };
X! static unsigned char grc[]={
X! 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x01, 0x0f, 0xff,
X! };
X! static unsigned char attr[]={
X! 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
X! 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
X! 0x01, 0x00, 0x0f, 0x00, 0x00,
X! };
X!
X! outb(0x3c4, 6); outb(0x3c5, 0xea); /* enable extended seq regs */
X!
X! outv(5, 0x3c4, 0x3c5, seq); /* reset, sequencer regs */
X!
X! outb(0x3c2, 0xc7); /* misc out reg */
X! outb(0x3c3, 0x01); /* VS.Video_Enable */
X! outb(0x3c4, 0xa4); outb(0x3c5, 0x10); /* extended sequencer regs */
X! outb(0x3c4, 0xfd); outb(0x3c5, 0xa0);
X! outb(0x3c4, 0xfc); outb(0x3c5, 0x08);
X! outb(0x3c4, 0xf6); outb(0x3c5, 0xc0);
X! outb(0x3c4, 0xf8); outb(0x3c5, 0x00);
X! outb(0x3c4, 0xff); outb(0x3c5, 0x10);
X! outb(0x3c4, 0xe0); outb(0x3c5, 0x00);
X! outb(0x3c4, 0); outb(0x3c5, 3); /* enable sequencer */
X!
X! outb(0x3c4, 6); outb(0x3c5, 0xea); /* enable extended seq regs */
X!
X! outb(0x3d4, 0x11); outb(0x3d5, 0x20); /* unprotect crtc regs 0-7 */
X! outv(25, 0x3d4, 0x3d5, crtc);
X!
X! outv(9, 0x3ce, 0x3cf, grc);
X!
X! inb(0x3da); outb(0x3c0,0); /* disable palette */
X!
X! inb(0x3da); /* reset attribute f/f */
X! outv(21, 0x3c0, 0x3c0, attr);
X!
X! outb(0x3c6, 0xff);
X! outb(0x3c0, 0x20); /* enable pallette */
X! outb(0x3c4, 6); outb(0x3c5, 0xae);
X! }
X!
X! void
X! set_text_mode()
X! {
X! static unsigned char seq[]={
X! 0x01, 0x00, 0x03, 0x00, 0x02,
X! };
X! static unsigned char crtc[]={
X! 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
X! 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
X! 0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
X! 0xff,
X! };
X! static unsigned char grc[]={
X! 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
X! 0xff,
X! };
X! static unsigned char pal[]={
X! 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
X! 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
X! 0x0c, 0x00, 0x0f, 0x08,
X! };
X!
X! outb(0x3d4, 0x11); outb(0x3d5, 0x20); /* unprotect crtc regs 0-7 */
X!
X! outb(0x3c4, 6); outb(0x3c5, 0xea); /* enable ext seq regs */
X!
X! inb(0x3da);
X! outb(0x3c0, 0);
X! outv(5, 0x3c4, 0x3c5, seq);
X!
X! outb(0x3c2, 0x67); /* misc out reg */
X! outb(0x3c4, 0xeb); outb(0x3c5, 0x00); /* extended sequencer regs */
X! outb(0x3c4, 0xf9); outb(0x3c5, 0x00);
X! outb(0x3c4, 0xa5); outb(0x3c5, 0x00);
X! outb(0x3c4, 0xf3); outb(0x3c5, 0x00);
X! outb(0x3c4, 0xfd); outb(0x3c5, 0x00);
X! outb(0x3c4, 0xa4); outb(0x3c5, 0x00);
X! outb(0x3c4, 0xfc); outb(0x3c5, 0x08);
X! outb(0x3c4, 0xf6); outb(0x3c5, 0x00);
X! outb(0x3c4, 0xf8); outb(0x3c5, 0x00);
X! outb(0x3c4, 0xff); outb(0x3c5, 0x00);
X! outb(0x3c4, 0xe0); outb(0x3c5, 0x00);
X! outb(0x3c4, 0); outb(0x3c5, 0x03);
X!
X! outb(0x3c4, 6); outb(0x3c5, 0xea);
X! outb(0x3d4, 0x11); outb(0x3c5, 0x20);
X!
X! outv(25, 0x3d4, 0x3d5, crtc);
X! outb(0x3cc, 0); outb(0x3ca, 1);
X! outv(9, 0x3ce, 0x3cf, grc);
X! inb(0x3da);
X! outv(20, 0x3c0, 0x3c0, pal);
X
X! outb(0x3c0, 0x20);
X! }
X
X! void
X! set_graphics_mode( VS )
X! register struct vga_video_hardware_state *VS ;
X {
X+ /* Setup I/O Base Address */
X+ /* Color 640 by 480 -- 16 Color
X+ OR - Color 720 by 540 -- 16 Color */
X+ #define Color_Base_Reg ( 0x3D0 )
X+
X+ /* Sequencer Registers 03C4 & 03C5 */
X+ SetVideoSequencer( Seq_ResetIndex, 0x01 ) ; /* Syncronous RESET */
X+ SetVideoSequencer( Clock_ModeIndex, 0x01 ) ;
X+ /* Make All Planes Writable */
X+ SetVideoSequencer( Mask_MapIndex, VGA_ALLPLANES ) ;
X+ SetVideoSequencer( Char_Map_SelectIndex, 0x00 ) ;
X+ SetVideoSequencer( Memory_ModeIndex, 0x06 ) ;
X+
X+ /* Write General Registers */
X+ /* VS.Input_Status_0 & VS.Input_Status_1 are READ-ONLY */
X+ outb( 0x3C2, /* VS.Misc_Output_Reg */ 0xA3 ) ; /* VS.Misc_Output_Reg */
X+ outb( Color_Base_Reg + 0xA, VS->Feature_Control ) ;
X+ outb( 0x3C3, /* VS.Video_Enable */ 0x1 ) ;
X+
X+ /* Re-Enable Hardware i.e. Reset Register */
X+ outb( 0x3C4, 0x00 ) ;
X+ outb( 0x3C5, /* VS.Seq_Reset */ 0x03 ) ; /* Enable Hardware Reset Register */
X+
X+ /* Attribute Registers */
X+
X+ INTS_OFF() ;
X+
X+ /* Initialize Flip-Flop */
X+ {
X+ register tmp = inb( Color_Base_Reg + 0xA ) ;
X+ }
X+
X+ /* Set Palette Register Value Equal To Palette Register Index Number */
X+ /* i.e. Palette is 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F */
X+ {
X register IO_Address Target_Reg ;
X+ inb(0x3da);
X for ( Target_Reg = 0 ; Target_Reg <= 0xF ; Target_Reg++ ) {
X! SetVideoAttribute( Target_Reg, Target_Reg ) ;
X }
X! }
X! SetVideoAttribute( AttributeModeIndex, 0x81 ) ;
X! SetVideoAttribute( OverScanColorIndex, 0x00 ) ;
X! SetVideoAttribute( ColorPlaneEnableIndex, VGA_ALLPLANES ) ;
X! SetVideoAttribute( HorizPelPanIndex, 0x00 ) ;
X! SetVideoAttribute( ColorSelectIndex, 0x00 ) ;
X!
X! /* Enable CRT Controller Registers 0-7 */
X! outb( 0x3D4, 0x11 ) ;
X! outb( 0x3D5, 0x0 ) ;
X! /* Set CRT Controller Registers 03?4 & 03?5 */
X! outb( 0x3D4, 0x00 ) ;
X! outb( 0x3D5, 0x5f ) ; /* VS.Horiz_Total */
X! outb( 0x3D4, 0x01 ) ;
X! outb( 0x3D5, 0x4f ) ; /* VS.Horiz_End */
X! outb( 0x3D4, 0x02 ) ;
X! outb( 0x3D5, 0x50 ) ; /* VS.H_Blank_Start */
X! outb( 0x3D4, 0x03 ) ;
X! outb( 0x3D5, /* VS.H_Blank_End */ 0x82 ) ;
X! outb( 0x3D4, 0x04 ) ;
X! outb( 0x3D5, /* VS.H_Retrace_Start */ 0x54 ) ;
X! outb( 0x3D4, 0x05 ) ;
X! outb( 0x3D5, /* VS.H_Retrace_End */ 0x80 ) ;
X! outb( 0x3D4, 0x06 ) ;
X! outb( 0x3D5, /* VS.Vert_Total */ 0xbf ) ;
X! outb( 0x3D4, 0x07 ) ;
X! outb( 0x3D5, /* VS.Overflow */ 0x1f ) ;
X! outb( 0x3D4, 0x08 ) ;
X! outb( 0x3D5, /* VS.Preset_Row_Scan */ 0 ) ;
X! outb( 0x3D4, 0x09 ) ;
X! outb( 0x3D5, /* VS.Max_Scan_Line */ 0x40 ) ;
X! outb( 0x3D4, 0x0A ) ;
X! outb( 0x3D5, /* VS.Cursor_Start */ 0 ) ;
X! outb( 0x3D4, 0x0B ) ;
X! outb( 0x3D5, /* VS.Cursor_End */ 0 ) ;
X! outb( 0x3D4, 0x0C ) ;
X! outb( 0x3D5, /* VS.Start_Addr_Hi */ 0 ) ;
X! outb( 0x3D4, 0x0D ) ;
X! outb( 0x3D5, /* VS.Start_Addr_Lo */ 0 ) ;
X! outb( 0x3D4, 0x0E ) ;
X! outb( 0x3D5, /* VS.Cursor_Loc_Hi */ 0 ) ;
X! outb( 0x3D4, 0x0F ) ;
X! outb( 0x3D5, /* VS.Cursor_Loc_Lo */ 0 ) ;
X! outb( 0x3D4, 0x10 ) ;
X! outb( 0x3D5, /* VS.V_Retrace_Start */ 0x83 ) ;
X! outb( 0x3D4, 0x11 ) ;
X! outb( 0x3D5, /* VS.V_Retrace_End */ 0x85 ) ;
X! outb( 0x3D4, 0x12 ) ;
X! outb( 0x3D5, /* VS.V_Display_End */ 0x5d ) ;
X! outb( 0x3D4, 0x13 ) ;
X! outb( 0x3D5, /* VS.Underline_Loc */ 0x28 ) ;
X! outb( 0x3D4, 0x14 ) ;
X! outb( 0x3D5, /* VS.Offset */ 0x0f ) ;
X! outb( 0x3D4, 0x15 ) ;
X! outb( 0x3D5, /* VS.V_Blank_Start */ 0x63 ) ;
X! outb( 0x3D4, 0x16 ) ;
X! outb( 0x3D5, /* VS.V_Blank_End */ 0xba ) ;
X! outb( 0x3D4, 0x17 ) ;
X! outb( 0x3D5, /* VS.CRTC_Mode */ 0xE3 ) ;
X! outb( 0x3D4, 0x18 ) ;
X! outb( 0x3D5, /* VS.Line_Compare */ 255 ) ;
X!
X! /* Set Graphics Registers 03CE & 03CF */
X! SetVideoGraphics( Set_ResetIndex, 0x00 ) ;
X! SetVideoGraphics( Enb_Set_ResetIndex, 0x00 ) ;
X! SetVideoGraphics( Color_CompareIndex, 0x00 ) ;
X! SetVideoGraphics( Data_RotateIndex, 0x00 ) ;
X! SetVideoGraphics( Read_Map_SelectIndex, 0x00 ) ;
X! SetVideoGraphics( Graphics_ModeIndex, VGA_WRITE_MODE_2 ) ;
X! SetVideoGraphics( MiscellaneousIndex, 0x05 ) ;
X! SetVideoGraphics( Color_Dont_CareIndex, VGA_ALLPLANES ) ;
X! SetVideoGraphics( Bit_MaskIndex, 0xFF ) ; /* All Bits Writable */
X!
X! /* Video DAC Registers 03C7 & 03C8 */
X! outb( 0x3C9, VS->PEL_Data_Reg ) ; /* 03C9 -- SAME */
X! outb( 0x3C6, VS->PEL_Mask_Reg ) ;
X
X! INTS_ON();
X }
X*** ./mit-orig/server/ddx/ibm/vga/vgaIO.c Thu Oct 4 16:51:04 1990
X--- ./mit/server/ddx/ibm/vga/vgaIO.c Sun Sep 16 22:14:12 1990
X***************
X*** 20,25 ****
X--- 20,26 ----
X * SOFTWARE.
X *
X */
X+
X #include "X.h"
X #include "resource.h"
X #include "scrnintstr.h"
X***************
X*** 30,35 ****
X--- 31,47 ----
X
X #include "ibmTrace.h"
X
X+ #include "pixmapstr.h"
X+ #include "miscstruct.h"
X+ #include "scrnintstr.h"
X+ #include "font.h"
X+ #include "pixmapstr.h"
X+ #include "window.h"
X+ #include "gcstruct.h"
X+ #include "colormapst.h"
X+ #include "cursorstr.h"
X+ #include "ppc.h"
X+
X /* Global Variables */
X extern int vgaDisplayTubeType ;
X extern ScreenRec vgaScreenRec ;
X***************
X*** 58,63 ****
X--- 70,76 ----
X
X vgaVisuals[0].class = ( vgaDisplayTubeType == COLOR_TUBE )
X ? PseudoColor : GrayScale ;
X+
X ppcCommonScreenInit( pScreen, index, &vgaScreenRec ) ;
X vgaCursorInit( index ) ;
X
END_OF_FILE
if test 39912 -ne `wc -c <'fix-14.sco10'`; then
echo shar: \"'fix-14.sco10'\" unpacked with wrong size!
fi
# end of 'fix-14.sco10'
fi
echo shar: End of archive 10 \(of 12\).
cp /dev/null ark10isdone
MISSING=""
for I in 1 2 3 4 5 6 7 8 9 10 11 12 ; do
if test ! -f ark${I}isdone ; then
MISSING="${MISSING} ${I}"
fi
done
if test "${MISSING}" = "" ; then
echo You have unpacked all 12 archives.
echo "instructions are in fix-14.sco01"
rm -f ark[1-9]isdone ark[1-9][0-9]isdone
else
echo You still need to unpack the following archives:
echo " " ${MISSING}
fi
## End of shell archive.
exit 0
dan
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