Level 7 interrupts
gt1740a at prism.gatech.edu
gt1740a at prism.gatech.edu
Mon Oct 8 07:30:00 AEST 1990
We at Geogia Tech are developing a native operating system called Clouds
running on Sun 3/50 workstations. We have provided interrupt handlers for
all maskable interrupts. The level 7 NMI is handled by the SUN monitor
interrupt handling routine.
Quite often we get an Exception 7C error while running Clouds. The
exception 7C is reported by the SUN monitor level 7 interrupt handler.
I have a couple of questions about this problem:
1. What causes the Exception 7C to be reported ?
2. Is there a way to prevent this exception without turning off level 7
feature of the clock ?
3. Why is that when we have enabled the clock only to generate level 5
interrupts, we get a level 7 interrupt at random?
4. Also, is there any potential problem (other than the obvious) in
turning off the clock interrupts (level 5) for too long?
Thanks in advance,
Ajay..
AJAY MOHINDRA
uucp: ...!{allegra,amd,hplabs,seismo,ut-ngp}!gatech!prism!gt1740a
ARPA: gt1740a at prism.gatech.edu
ajay at cc.gatech.edu
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