make difficulties

[Mark Levison]

   I have a problem with make on a Sun 3/80 running SunOs 4.0.3 that I
have spent the past two days trying to solve. The makefile in my main
working directory must be capabale of building 30+ different executables
from about 45 common source files and 1 uniques source file per
executable. Make has handled of all this nicely with just one command
line arguement. Recently I decided it would be advantageous to have my
makefile manage separate directories for each of debugabble, profiled
and clean object files and executables. I would like to add a second
command line option an addition target or a macro to choose which class
of compilation will occur each time. So far the best I have managed to
come up with is to have a separate macro DIR defined on the command
line. I define DIR to be the profile, debug or clean and then use a
pattern dependancy rule for each directory which gets the various flags
set correctly for each source compilation. The problem comes from the
fact that this requires 3 sets of rules for each executable

profiles/pr:~$(PR_OBJECTS) $(LIB_DEP)
~gcc -pg $(OPT) -o $@ $(PR_OBJECTS) $(LIB_PATH) $(LIBS)
~beep

debug/pr:~$(PR_DB_OBJECTS)
~cc -g -o $@ $(PR_DB_OBJECTS) $(DB_LIB_PATH) $(DB_LIBS)
~beep

clean/pr:~$(PR_OBJECTS) $(LIB_DEP)
~gcc $(OPT) -o $@ $(PR_OBJECTS) $(LIB_PATH) $(LIBS)
~beep

note that the important difference between debug and profiles, clean is
that for profiles and clean of source files except the one containing
the main function are placed in library, while the debugabble version
just links all of the object files. So I guess what I need is based on
the value of the second parameter to make be able to set the values for
a number of macros. Short of writing a C program or using make to call
make with all the right macros defined does anyone have any good ideas?

Mark Levison
levisonm at qucis.queensu.ca