Information on SPARC assembly (atomic Test and Set)

[Guy Harris]

>	I need some help in finding information on coding atmoic bit
>operations on a Sun-4 (SPARC).  I wasn't able to find a reference to a
>"Test and Set" operation in the Assembly guide that comes with our
>Sun-4.

Somebody in comp.lang.c once falsely asserted that there was no such
instruction, so I'll note here that there are, in fact, two pairs of
atomic operations: LDSTUB (Atomic Load-Store Unsigned Byte), with
LDSTUBA a variant that permits you to specify an address space
identifier, and SWAP (Swap r Register With Memory), which also has a
SWAPA variant specifying an address space.

>	Are there any other references on SPARC assembly, Sun published or
>otherwise ?

You presumably want an architecture manual; Sun publishes one, which is
unfortunately in the standard Sun 8 1/2" x 11" form factor, and Cypress
Semiconductor has a book for their SPARC implementation, which includes
the same instruction set and architecture information but in a more
compact form factor.  I think Fujitsu may do so as well; I can't speak
for LSI Logic.