Cache vs. Mhz

Arthur Tateishi ruhtra at turing.toronto.edu
Thu Aug 2 05:53:31 AEST 1990


In article <1366 at sixhub.UUCP> davidsen at sixhub.UUCP (Wm E. Davidsen Jr) writes:
>
>In article <1990Jul25.030258.11568 at cunixf.cc.columbia.edu> chaiklin at cunixf.cc.columbia.edu (Seth Chaiklin) writes:
>| 
>| I have a dilemma.  I must take either a 25 Mhz 386 machine
>| with no cache or a 20 Mhz 386 machine with a 64K cache.
>
>For almost any other application I would go with the 20MHz and cache.
>The cache will give you about 15% improvement with a 1w/s memory. I
>would be very sure whats happening if the 25MHz machine claims to be
>0w/s, unless it is running fast interleaved memory.

This touches on a choice I made a few months ago. I bought a 20MHz
386 (AMI, C&T) because it was reported to be 0w/s. All the 25-33MHz machines
around had caches and up here the cache basicly added $600 to the price. 
I opted for a 20MHz 386+387 combination since I figured the 387 would be
more useful to me than a cache. Later I learn about memory pre-charge time
and started to question the meaning of 0w/s. Recently, I have also heard
about pipelined memory accesses( does this eliminate pre-charge delays?).
I'd like to get a proper explanation of what a cache does to improve the
performance of a machine with 0w/s memory.
I currently have 4MB RAM (100ns) set to 0w/s.

-- 
``Sex and drugs? They're nothing compared with a good proof!''
                                - A Cambridge student  (r.h.f)
Arthur Tateishi                 g9ruhtra at zero.cdf.utoronto.edu



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