Preprocessor dependencies in MAKE

[Robert Perlberg]

Environment: Sun3 under SunOS 4.0.3

I'm using a language (Ingres embedded SQL for C) which preprocesses
into C.  I need to generate a command sequence like the following:

	esqlc runme.sc
	cc -g -c runme.c
	cc -g -o runme runme.o -lingres -lm

where esqlc creates runme.c.  Since I have to compile an application
which is made up of many `.sc' files, I would like to create a Make
rule that will understand this general dependency so I don't have to
create an explicit dependency for each file.  I have tried the
following:

	.SUFFIXES: .sc

	.sc.c:
		esqlc $*.sc

	runme: runme.o
		$(CC) $(CFLAGS) -o $@ runme.o -lingres -lm

With this I get the error "make: don't know how to make `runme.o'"

If I change the rule to:

	.sc.o:
		esqlc $*.sc
		$(CC) $(CFLAGS) -c $*.c

it works the first time, but then if I modify runme.sc and run make it
says "`runme' is up to date".

I don't want to remove the `.c' file after compiling since it's needed
if I want to debug the program with dbx.  How do I do this?

Thanks in advance.

Robert Perlberg
Dean Witter Reynolds Inc., New York
murphy!dwrsun2!perl
	-- "I am not a language ... I am a free man!"