pyramid architectural restraints

[John Sissler]

We currently have a pyramid 90x which I am evaluating in my copious spare
time.  It's configured with 4m main, and ~900m disk.  We do not have
data cache installed yet.  So far, a great deal of fun has been had, but
the 90x faults on non-long-aligned 32-bit memory operations.  Any comments,
questions, opinions, etc, would be of interest.  Especially regarding the
above item.  Also, I am interested in exchanging benchmark stats (vs
780, 750).  Lastly, I am curious about up-and-coming architectures (exp.
DEC) with the above constraint.  

			{decvax|ihnp4|allegra}!philabs!hhb!jon