Excelan link level tests
tcs%usna.uucp at BRL-BMD.ARPA
tcs%usna.uucp at BRL-BMD.ARPA
Wed Feb 6 04:38:59 AEST 1985
Mike Muuss (mike at brl) and I (tcs at usna) briefly tested the Excelan Unibus
Ethernet controller (Exos 204) in link controller mode on two Vax
11/780 processors. Below is the performance matrix we obtained from the
Excelans, a pair of Interlans (NI1010), and a pair of PCL-11s. The speed
of the PCL was approximately 1M bit/sec between the two systems.
The test program was ttcp, modified to run on 4.2. Ttcp is a
program that can transmit or receive data over network connections.
In transmitter mode, it can send a user specified number of 1K byte
zero filled packets. In receiver mode, the packets are dumped one by
one into a single buffer, overwriting the previous packet. This is
useful for benchmarking network performance between two processes.
Different modes allow the transmitter and receiver to read and write
data on stdin and stdout. This routine is available to anyone
interested.
The writing cpu was BRL's dual vax (VGR) which we ran in both dual and
single processor configurations. The receiving cpu was a standard 780
(TGR). Both systems have the new MS780E memory controllers with at least
6Mby of memory. VGR was running multi-user but we were the only users
on the system. TGR was running single user. We tested the links by
sending 1Mby of data as 1K byte packets.
We tested with trailers on and off. We found it interesting
that the system load reduction from using trailers is a lot less than
expected.
The pcl doesn't have a local network packet so there are no
headers or trailers. We did run across an anomoly where the system
times for the pcl dropped to 5-8%. It did this three consecutive times
(two documented below). We ran some other network & disk routines
(fsck, rlogin, ftp) and the system times jumped back up. Note that the
usage was similar on both machines. This would seem to rule out any
alignment with the system clock which might hide the utilization from
process accounting. Anyone have any ideas?
The excelan was setup to burst 4 words per unibus dma. It is
jumper configurable to 2, 4, 8, or 16 word bursts. Excelan's additional
CPU overhead per kilobyte is due in part to handling the message queues
used to communicate with the board (similar to the DEUNA). We did not
examine the driver for possible improvements in performance.
The cpu configurations of VGR are noted as 'dual' and 'single'.
VGR (Transmitter)
Interface Usr Sys % cpu Real Kby/S Kby/Cpu-Sec
---------------------------------------------------------------------
dual,ex0,-trailers .5 6.5 40 17 60.2 150
dual,ex0,trailers .5 6.6 42 16 64 152
dual,il0,-trailers .3 5.4 25 22 46.5 186
dual,il0,trailers .4 5.6 24 24 42.6 178
dual,pcl0 .5 4.9 24 18 56.8 237
single,pcl0 .2 3.9 22 19 53.8 244
single,pcl0 .0 1.7 8 19 53.8 673
single,pcl0 .0 1.5 8 19 53.8 673
>>>>> ran fsck, rlogin, ftp <<<<<<
single,pcl0 .1 5.4 28 20 51.2 182
single,pcl0 .6 5.4 32 18 56.8 178
single,il0,trailers .3 5.8 24 25 40.9 170
single,ex0,trailers .5 6.0 35 18 56.8 162
single,ex0,trailers .4 6.2 36 18 56 156
single,ex0,-trailers .6 6.0 38 17 60.2 158
single,ex0,-trailers .6 5.9 38 17 60.2 158
TGR (Receiver)
Interface Usr Sys % cpu Real Kby/S Kby/Cpu-Sec
---------------------------------------------------------------------
dual,ex0,-trailers .1 8.7 45 17 60.2 133
dual,ex0,trailers .0 10.3 59 16 64 108
dual,il0,-trailers .1 5.8 25 22 46.5 186
dual,il0,trailers .1 5.7 23 24 42.6 185
dual,pcl0 .0 5.3 24 18 56.8 237
single,pcl0 .0 4.6 24 19 53.8 244
single,pcl0 .0 1.1 5 19 53.8 1076
single,pcl0 .0 1.3 6 19 53.8 896
>>>>> ran fsck, rlogin, ftp <<<<<<
single,pcl0 .0 6.6 31 20 51.2 165
single,pcl0 .0 6.7 35 18 56.8 162
single,il0,trailers .1 5.4 21 25 40.9 194
single,ex0,trailers .1 10.1 54 18 56.8 105
single,ex0,trailers .0 9.8 54 18 56 104
single,ex0,-trailers .1 9.3 53 17 60.2 114
single,ex0,-trailers .1 9.2 53 17 60.2 114
-tcs
Terry Slattery U.S. Naval Academy 301-267-4413
ARPA: tcs at brl-bmd UUCP: decvax!brl-bmd!usna!tcs
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