VM on 680x0? Almost...

[John Gilmore]

>      A cursory reading of the M68000 manual indicates that them M68010 and
> M68020 are capable of supporting hypervisors.

The 68010 and 68020 are ALMOST capable of supporting hypervisors.
Unfortunately there is one thing you can't simulate: RTE (Return
from Exception) into the middle of an instruction as a bus error
recovery.  If the virtual machine trashes its stack, there is no
way for the hypervisor to validate the stack other than to run a
real, privileged RTE on that stack -- which could hang or kill the
machine, since it contains numerous internal registers including
the microprogram counter (uPC).  The chip itself is pretty lax about
validating the stack; it will load anything that looks half reasonable.
In fact, in the 68020 this is how the chip is jumped into test microcode
in Motorola manufacturing tests.  IBM didn't have this problem because
they take the "undo all the side effects" approach to taking page faults
in mid instruction, rather than "save everything and restore it later".

Other than that, it makes a fine VM machine -- quite a bit better than
IBM's in hardware support, since it lets the hypervisor do things like
simulate memory mapped I/O devices transparently.  If you take a page
fault you have two options:  supply the data and set a bit -- the CPU
continues the instruction -- or don't supply the data, then the CPU
will retry the access, hoping that you have since brought in the page
that faulted.  With the first option you can do things like define a
"software UART" that looks to the virtual machine exactly like a
hardware UART, but gives the user memory accesses to the hypervisor to do
whatever it wants with them.

Now if only 4.2BSD had that feature!  (Hiding a process behind memory,
e.g. a file.)