make bug

[andre]

In article <904 at philmds.UUCP> leo at philmds.UUCP (Leo de Wit) writes:

}In article <502 at Aragorn.dde.uucp> ct at dde.uucp (Claus Tondering) writes:
}    [first example omitted ...]
}|Now, consider the following makefile:
}|
}|ALPHA = foo
}|BETA  = $(ALPHA) bar
}|
}|all:
}|      echo $(BETA:bar=hello)
}|
}|Running make with this makefile will result in the execution of the
}|command "echo $(ALPHA) hello", which is certainly not what I would
}|expect.
}|
}|Why is ALPHA not substituted in the last example? Bug or feature?

}What would you expect? "$(BETA:bar=hello)" is certainly not Make syntax.
}Make doesn't know about sh or csh variable substitution, if that was
}your intention.
>						 Leo.

The $(VAR:foo=bar) notation is perfectly normal make syntax. It means
while expanding VAR, substitute foo by bar. This is mostly used as
  SRC=a.c b.c c.c
  OBJ=$(SRC:.c=.o)

Back to the original question, Yes it is a bug. What I think that happenes
is the following. To save space make does not expand variables when they
are assinged to one another. When a variable is needed, expansion occurs.
The trouble is that when a substitution is detected, further expansion
is not checked for as is done for normal expansion.
The same problem occurs in the public domain make that was posted a while
back. The substitution funstion was not glad with what it had done and
left the $VAR occurences that were still in the string. I suspect that the
standard make has the same problem.

	Hope this helps.

One thing to ponder, should make be able to handle this?

STR=h w
HI=hello
TEXT=STR
H=h
HELLO=$HI

all:
	echo $($($TEXT:w=world):$H=$HELLO)

And the result of this is:
	echo :h=hELLO)

-- 
~----~ |m    AAA         DDDD  It's not the kill, but the thrill of the chase.
~|d1|~@--   AA AAvv   vvDD  DD        Segment registers are for worms.
~----~  &  AAAAAAAvv vvDD  DD
~~~~~~ -- AAA   AAAvvvDDDDDD        Andre van Dalen, uunet!mcvax!targon!andre