33 MHz 486 system for SCO Unix
L N Chung
ees1lc at thorin.ee.surrey.ac.uk
Sat May 11 03:07:58 AEST 1991
Many Thanks to everybody who reply to my query about SCO Unix systems.
I would like to clear up one point:
If SCO Unix does disk cacheing inside its kernel, does it mean it is
pointless in using cacheing controller ? If so, how does SCO Unix
support these controllers, does it just turn the cache off and use its
own?
What is the difference between "Track-at-a-time" controllers and cacheing
ones? Will they do a better job.
Thanks again.
--------------------------------------------------------------------------
L.N. Chung Dept of Elec. Eng, University of Surrey,
(ees1lc at ee.surrey.ac.uk) Guildford, Surrey, GU2 5XH. UK.
(l.chung at ee.surrey.ac.uk) PHONE: +44 483 571281 FAX: +44 483 34139
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