OOPS J11 chipset (bug fix)(pointer)

[Stephen C. Woods]

OOPS! When I posted my article about the J11 chip set, I left out one
instruction from the diagnostic. This will cause the diagnostic to
always fail (even on good chips). The missing instruction is a cfcc
(Copy Floating Condition Codes) that should be between the
cmpd	(r2),ac0
			and the
beq	102$ 
I also discovered a couple of small errors in my transcription of the
letter from DEC, the have also been corrected.  I have reposted the
entire (corrected) article to net.sources.bugs.

I'd like to thank Paul McKenney (mckenney at orstcs.UUCP) for pointing
this error out to me.

For those of you that didn't see the first article:
DEC has discovered a problem affecting ~9% of the J11 chips made before
May 1,1984.  I have (re)posted a large article to net.sources.bugs discussing
the problem. The article contains diagnostics and the hotline number from DEC.
-- 
Stephen C. Woods (VA Wadsworth Med Ctr./UCLA Dept. of Neurology)
uucp:	{ {ihnp4, uiucdcs}!bradley, hao, trwrb}!cepu!scw
ARPA: cepu!scw at ucla-cs location: N 34 3' 9.1" W 118 27' 4.3"