Make mysteries...

[Alan Takahashi]

A "make" question:

  I have a directory setup where my *.c files are in the src/ directory,
  and my *.h files are in the incl/ directory.  I have a third directory
  called objects/ which will contain the *.o files and already contains
  the make file.  The directory setup looks like this:

                                $HOME
                              /   /  \
                         /----   /   ----\
                       src/    incl/    objects/

  Since my objects and my source files are in two different directories,
  my dependencies would have to travel across directories.  If they were
  all in the same directory, then I would have something like this:

  srcfile = file1.o file2.o file3.o

  all : $(srcfile)
	ln ...

  $(srcfile) : incl1.h incl2.h incl3.h
	cc ...

Now for the question:
  How can I setup this make file so that file1.o,file2.o,file3.o can be in
  the objects/ directory while the source files file1.c,file2.c,file3.c
  remain in the src/ directory??  I still want to use the "srcfile=..."
  format.

  (The issue is how to keep the dependencies between file1.o and file1.c
   intact.  I've tried various incarnations of the $$@ variable, but to
   no avail).

Thanks for any help.

------------------------------------------------------------------------------
Alan Takahashi                            !     hplabs   amdahl
Bell-Northern Research                    !          \   / 
Mountain View, CA                         !   .....!{-----}!bnrmtv!takahashi
                                          !          /   \
"When you need to knock on wood is when   !    3comvax   ames
  you realize the world's composed of     !-----------------------------------
  aluminum and vinyl." -- Flugg's Law     ! DISCLAIMER: It's all an illusion.
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