RISC (Reduced Instruction-Set Chip) vs. CISC

[Chin Fang]

In article <1991Apr24.224650.27937 at sol.UVic.CA> jtice at arlo.UVic.CA (Jason W. Tice) writes:
>Any information regarding the RISC and CISC chips would be greatly appreciated.
>
>What does it do? 

A good book on this is Profs. John Hennessy and David Patterson's  Computer 
Archetectures.  The first author is the orignator of MIPS, the second
is the orignator of RISC (ancestor of SUN's SPARC).  A very delightful
and information packed book. I love it even I am a Mechanical Engineer (Sigh..) 

Dr. Hennessy is at Stanford and Dr. Patterson is at Berkeley.  Both places
are big camps of RISC (coined at Berkeley however) researches with Berkeley
CAD (computer aided design) probably stronger.

>what are it's parametres?

Please see above reference.

>what is the difference between RISC and CISC ?

ditto.

>can you tell me where to look to find more information on them?

^
|

I believe many people would enjoy the chance of looking at kernel 
disk file sizes.  Below I give three (vm)unix file sizes:        

RS6000 supersalar -> multiple instructions per clock, in the case of 
                      IBM, the number is 4
        1271128 bytes

SUN OS 4.1.1 on SPARC -> derivative of Berkeley RISC 

        1303014 bytes

Ultrix 4.1 on MIPS 5500 (DEC System 5500, Stanford MIPS project decendent)

        3375632 bytes

How about your SysV/386 /unix?  Kind of tiny comparing with the trio above
right?  

Note, I didn't care to find out how many drivers are installed in each one.
But it's safe to say they are BIG.

How about the trio's performance difference?  Well, IBM has the best floating
point perfomance and the worst UNIX implementation, buggy and nasty to work
with.  But if it's fast (even the 320 has 8.5 MFLOPS, enough to leave SUN 
SPARC 2 in dust!) then all it's sins are forgivable to some one who crunches 
numbers. To system programmers? ......


Cheers

Chin Fang
Mechanical Engineering Department
Stanford University
fangchin at leland.stanford.edu